822 lines
21 KiB
C++
822 lines
21 KiB
C++
#pragma once
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#include <cinttypes>
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#include <type_traits>
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#include <memory>
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#include "FastSIMD/FastSIMD.h"
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#ifdef _MSC_VER
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#if defined( _M_IX86_FP ) && _M_IX86_FP < 2
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#define FS_VECTORCALL
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#else
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#define FS_VECTORCALL __vectorcall
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#endif
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#define FS_INLINE __forceinline
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#else
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#define FS_VECTORCALL
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#define FS_INLINE __attribute__((always_inline)) inline
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#endif
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#ifndef NDEBUG
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#undef FS_INLINE
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#define FS_INLINE inline
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#endif
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/// <summary>
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/// Number of 32 width elements that will fit into a vector
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/// </summary>
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/// <remarks>
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/// Compile time constant
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/// </remarks>
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/// <code>
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/// size_t FS_Size_32()
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/// </code>
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#define FS_Size_32() FS::template VectorSize<32>
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// Vector builders
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/// <summary>
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/// Vector with values incrementing from 0 based on element index {0, 1, 2, 3...}
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/// </summary>
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/// <code>
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/// example: int32v::FS_Incremented()
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/// </code>
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#define FS_Incremented() Incremented()
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// Load
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/// <summary>
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/// Copies sizeof(float32v) bytes from given memory location into float32v
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/// </summary>
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/// <remarks>
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/// Memory does not need to be aligned
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/// </remarks>
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/// <code>
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/// float32v FS_Load_f32( void const* ptr )
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/// </code>
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#define FS_Load_f32( ... ) FS::Load_f32( __VA_ARGS__ )
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/// <summary>
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/// Copies sizeof(int32v) bytes from given memory location into int32v
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/// </summary>
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/// <remarks>
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/// Memory does not need to be aligned
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/// </remarks>
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/// <code>
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/// int32v FS_Load_i32( void const* ptr )
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/// </code>
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#define FS_Load_i32( ... ) FS::Load_i32( __VA_ARGS__ )
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// Store
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/// <summary>
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/// Copies all elements of float32v to given memory location
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/// </summary>
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/// <code>
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/// void FS_Store_f32( void* ptr, float32v f )
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/// </code>
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#define FS_Store_f32( ... ) FS::Store_f32( __VA_ARGS__ )
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/// <summary>
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/// Copies all elements of int32v to given memory location
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/// </summary>
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/// <code>
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/// void FS_Store_i32( void* ptr, int32v i )
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/// </code>
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#define FS_Store_i32( ... ) FS::Store_i32( __VA_ARGS__ )
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// Cast
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/// <summary>
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/// Bitwise cast int to float
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/// </summary>
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/// <code>
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/// float32v FS_Casti32_f32( int32v i )
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/// </code>
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#define FS_Casti32_f32( ... ) FS::Casti32_f32( __VA_ARGS__ )
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/// <summary>
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/// Bitwise cast float to int
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/// </summary>
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/// <code>
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/// int32v FS_Castf32_i32( float32v f )
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/// </code>
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#define FS_Castf32_i32( ... ) FS::Castf32_i32( __VA_ARGS__ )
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// Convert
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/// <summary>
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/// Convert int to float
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/// </summary>
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/// <remarks>
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/// Rounding: truncate
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/// </remarks>
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/// <code>
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/// float32v FS_Converti32_f32( int32v i )
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/// </code>
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#define FS_Converti32_f32( ... ) FS::Converti32_f32( __VA_ARGS__ )
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/// <summary>
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/// Convert float to int
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/// </summary>
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/// <code>
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/// int32v FS_Convertf32_i32( float32v f )
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/// </code>
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#define FS_Convertf32_i32( ... ) FS::Convertf32_i32( __VA_ARGS__ )
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// Select
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/// <summary>
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/// return ( m ? a : b )
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/// </summary>
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/// <code>
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/// float32v FS_Select_f32( mask32v m, float32v a, float32v b )
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/// </code>
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#define FS_Select_f32( ... ) FS::Select_f32( __VA_ARGS__ )
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/// <summary>
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/// return ( m ? a : b )
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/// </summary>
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/// <code>
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/// int32v FS_Select_i32( mask32v m, int32v a, int32v b )
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/// </code>
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#define FS_Select_i32( ... ) FS::Select_i32( __VA_ARGS__ )
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// Min, Max
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/// <summary>
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/// return ( a < b ? a : b )
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/// </summary>
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/// <code>
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/// float32v FS_Min_f32( float32v a, float32v b )
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/// </code>
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#define FS_Min_f32( ... ) FS::Min_f32( __VA_ARGS__ )
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/// <summary>
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/// return ( a > b ? a : b )
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/// </summary>
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/// <code>
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/// float32v FS_Max_f32( float32v a, float32v b )
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/// </code>
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#define FS_Max_f32( ... ) FS::Max_f32( __VA_ARGS__ )
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/// <summary>
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/// return ( a < b ? a : b )
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/// </summary>
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/// <code>
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/// int32v FS_Min_i32( int32v a, int32v b )
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/// </code>
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#define FS_Min_i32( ... ) FS::Min_i32( __VA_ARGS__ )
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/// <summary>
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/// return ( a > b ? a : b )
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/// </summary>
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/// <code>
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/// int32v FS_Max_i32( int32v a, int32v b )
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/// </code>
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#define FS_Max_i32( ... ) FS::Max_i32( __VA_ARGS__ )
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// Bitwise
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/// <summary>
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/// return ( a & ~b )
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/// </summary>
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/// <code>
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/// float32v FS_BitwiseAndNot_f32( float32v a, float32v b )
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/// </code>
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#define FS_BitwiseAndNot_f32( ... ) FS::BitwiseAndNot_f32( __VA_ARGS__ )
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/// <summary>
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/// return ( a & ~b )
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/// </summary>
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/// <code>
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/// int32v FS_BitwiseAndNot_i32( int32v a, int32v b )
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/// </code>
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#define FS_BitwiseAndNot_i32( ... ) FS::BitwiseAndNot_i32( __VA_ARGS__ )
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/// <summary>
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/// return ( a & ~b )
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/// </summary>
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/// <code>
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/// mask32v FS_BitwiseAndNot_m32( mask32v a, mask32v b )
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/// </code>
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#define FS_BitwiseAndNot_m32( ... ) FastSIMD::BitwiseAndNot_m32<FS>( __VA_ARGS__ )
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/// <summary>
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/// return ZeroExtend( a >> b )
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/// </summary>
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/// <code>
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/// float32v FS_BitwiseShiftRightZX_f32( float32v a, int32_t b )
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/// </code>
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#define FS_BitwiseShiftRightZX_f32( ... ) FS::BitwiseShiftRightZX_f32( __VA_ARGS__ )
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/// <summary>
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/// return ZeroExtend( a >> b )
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/// </summary>
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/// <code>
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/// float32v FS_BitwiseShiftRightZX_i32( int32v a, int32_t b )
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/// </code>
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#define FS_BitwiseShiftRightZX_i32( ... ) FS::BitwiseShiftRightZX_i32( __VA_ARGS__ )
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// Abs
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/// <summary>
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/// return ( a < 0 ? -a : a )
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/// </summary>
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/// <code>
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/// float32v FS_Abs_f32( float32v a )
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/// </code>
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#define FS_Abs_f32( ... ) FS::Abs_f32( __VA_ARGS__ )
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/// <summary>
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/// return ( a < 0 ? -a : a )
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/// </summary>
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/// <code>
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/// int32v FS_Abs_i32( int32v a )
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/// </code>
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#define FS_Abs_i32( ... ) FS::Abs_i32( __VA_ARGS__ )
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// Float math
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/// <summary>
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/// return sqrt( a )
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/// </summary>
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/// <code>
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/// float32v FS_Sqrt_f32( float32v a )
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/// </code>
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#define FS_Sqrt_f32( ... ) FS::Sqrt_f32( __VA_ARGS__ )
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/// <summary>
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/// return APPROXIMATE( 1.0 / sqrt( a ) )
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/// </summary>
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/// <code>
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/// float32v FS_InvSqrt_f32( float32v a )
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/// </code>
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#define FS_InvSqrt_f32( ... ) FS::InvSqrt_f32( __VA_ARGS__ )
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/// <summary>
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/// return APPROXIMATE( 1.0 / a )
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/// </summary>
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/// <code>
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/// float32v FS_Reciprocal_f32( float32v a )
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/// </code>
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#define FS_Reciprocal_f32( ... ) FS::Reciprocal_f32( __VA_ARGS__ )
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// Floor, Ceil, Round
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/// <summary>
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/// return floor( a )
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/// </summary>
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/// <remarks>
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/// Rounding: Towards negative infinity
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/// </remarks>
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/// <code>
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/// float32v FS_Floor_f32( float32v a )
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/// </code>
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#define FS_Floor_f32( ... ) FS::Floor_f32( __VA_ARGS__ )
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/// <summary>
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/// return ceil( a )
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/// </summary>
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/// <remarks>
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/// Rounding: Towards positive infinity
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/// </remarks>
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/// <code>
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/// float32v FS_Ceil_f32( float32v a )
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/// </code>
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#define FS_Ceil_f32( ... ) FS::Ceil_f32( __VA_ARGS__ )
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/// <summary>
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/// return round( a )
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/// </summary>
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/// <remarks>
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/// Rounding: Banker's rounding
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/// </remarks>
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/// <code>
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/// float32v FS_Round_f32( float32v a )
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/// </code>
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#define FS_Round_f32( ... ) FS::Round_f32( __VA_ARGS__ )
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// Trig
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/// <summary>
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/// return APPROXIMATE( cos( a ) )
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/// </summary>
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/// <code>
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/// float32v FS_Cos_f32( float32v a )
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/// </code>
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#define FS_Cos_f32( ... ) FastSIMD::Cos_f32<FS>( __VA_ARGS__ )
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/// <summary>
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/// return APPROXIMATE( sin( a ) )
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/// </summary>
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/// <code>
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/// float32v FS_Sin_f32( float32v a )
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/// </code>
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#define FS_Sin_f32( ... ) FastSIMD::Sin_f32<FS>( __VA_ARGS__ )
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// Math
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/// <summary>
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/// return pow( v, pow )
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/// </summary>
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/// <code>
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/// float32v FS_Pow_f32( float32v v, float32v pow )
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/// </code>
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#define FS_Pow_f32( ... ) FastSIMD::Pow_f32<FS>( __VA_ARGS__ )
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/// <summary>
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/// return log( a )
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/// </summary>
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/// <remarks>
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/// a <= 0 returns 0
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/// </remarks>
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/// <code>
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/// float32v FS_Log_f32( float32v a )
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/// </code>
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#define FS_Log_f32( ... ) FastSIMD::Log_f32<FS>( __VA_ARGS__ )
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/// <summary>
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/// return exp( a )
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/// </summary>
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/// <remarks>
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/// a will be clamped to -88.376, 88.376
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/// </remarks>
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/// <code>
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/// float32v FS_Exp_f32( float32v a )
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/// </code>
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#define FS_Exp_f32( ... ) FastSIMD::Exp_f32<FS>( __VA_ARGS__ )
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// Mask
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/// <summary>
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/// return ( m ? a : 0 )
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/// </summary>
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/// <code>
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/// int32v FS_Mask_i32( int32v a, mask32v m )
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/// </code>
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#define FS_Mask_i32( ... ) FS::Mask_i32( __VA_ARGS__ )
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/// <summary>
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/// return ( m ? a : 0 )
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/// </summary>
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/// <code>
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/// float32v FS_Mask_f32( float32v a, mask32v m )
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/// </code>
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#define FS_Mask_f32( ... ) FS::Mask_f32( __VA_ARGS__ )
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/// <summary>
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/// return ( m ? 0 : a )
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/// </summary>
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/// <code>
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/// int32v FS_NMask_i32( int32v a, mask32v m )
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/// </code>
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#define FS_NMask_i32( ... ) FS::NMask_i32( __VA_ARGS__ )
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/// <summary>
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/// return ( m ? 0 : a )
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/// </summary>
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/// <code>
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/// float32v FS_NMask_f32( float32v a, mask32v m )
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/// </code>
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#define FS_NMask_f32( ... ) FS::NMask_f32( __VA_ARGS__ )
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/// <summary>
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/// return m.contains( true )
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/// </summary>
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/// <code>
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/// bool FS_AnyMask_bool( mask32v m )
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/// </code>
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#define FS_AnyMask_bool( ... ) FS::AnyMask_bool( __VA_ARGS__ )
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// FMA
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/// <summary>
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/// return ( (a * b) + c )
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/// </summary>
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/// <code>
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/// float32v FS_FMulAdd_f32( float32v a, float32v b, float32v c )
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/// </code>
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#define FS_FMulAdd_f32( ... ) FastSIMD::FMulAdd_f32<FS>( __VA_ARGS__ )
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/// <summary>
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/// return ( -(a * b) + c )
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/// </summary>
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/// <code>
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/// float32v FS_FNMulAdd_f32( float32v a, float32v b, float32v c )
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/// </code>
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#define FS_FNMulAdd_f32( ... ) FastSIMD::FNMulAdd_f32<FS>( __VA_ARGS__ )
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// Masked float
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/// <summary>
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/// return ( m ? (a + b) : a )
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/// </summary>
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/// <code>
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/// float32v FS_MaskedAdd_f32( float32v a, float32v b, mask32v m )
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/// </code>
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#define FS_MaskedAdd_f32( ... ) FastSIMD::MaskedAdd_f32<FS>( __VA_ARGS__ )
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/// <summary>
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/// return ( m ? (a - b) : a )
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/// </summary>
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/// <code>
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/// float32v FS_MaskedSub_f32( float32v a, float32v b, mask32v m )
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/// </code>
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#define FS_MaskedSub_f32( ... ) FastSIMD::MaskedSub_f32<FS>( __VA_ARGS__ )
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/// <summary>
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/// return ( m ? (a * b) : a )
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/// </summary>
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/// <code>
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/// float32v FS_MaskedMul_f32( float32v a, float32v b, mask32v m )
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/// </code>
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#define FS_MaskedMul_f32( ... ) FastSIMD::MaskedMul_f32<FS>( __VA_ARGS__ )
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// Masked int32
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/// <summary>
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/// return ( m ? (a + b) : a )
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/// </summary>
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/// <code>
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/// int32v FS_MaskedAdd_i32( int32v a, int32v b, mask32v m )
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/// </code>
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#define FS_MaskedAdd_i32( ... ) FastSIMD::MaskedAdd_i32<FS>( __VA_ARGS__ )
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/// <summary>
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/// return ( m ? (a - b) : a )
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/// </summary>
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/// <code>
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/// int32v FS_MaskedSub_i32( int32v a, int32v b, mask32v m )
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/// </code>
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#define FS_MaskedSub_i32( ... ) FastSIMD::MaskedSub_i32<FS>( __VA_ARGS__ )
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/// <summary>
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/// return ( m ? (a * b) : a )
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/// </summary>
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/// <code>
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/// int32v FS_MaskedMul_i32( int32v a, int32v b, mask32v m )
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/// </code>
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#define FS_MaskedMul_i32( ... ) FastSIMD::MaskedMul_i32<FS>( __VA_ARGS__ )
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/// <summary>
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/// return ( m ? (a + 1) : a )
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/// </summary>
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/// <code>
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/// int32v FS_MaskedIncrement_i32( int32v a, mask32v m )
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/// </code>
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#define FS_MaskedIncrement_i32( ... ) FastSIMD::MaskedIncrement_i32<FS>( __VA_ARGS__ )
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/// <summary>
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/// return ( m ? (a - 1) : a )
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/// </summary>
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/// <code>
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/// int32v FS_MaskedDecrement_i32( int32v a, mask32v m )
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/// </code>
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#define FS_MaskedDecrement_i32( ... ) FastSIMD::MaskedDecrement_i32<FS>( __VA_ARGS__ )
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// NMasked float
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/// <summary>
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/// return ( m ? a : (a + b) )
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/// </summary>
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/// <code>
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/// float32v FS_NMaskedAdd_f32( float32v a, float32v b, mask32v m )
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/// </code>
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#define FS_NMaskedAdd_f32( ... ) FastSIMD::NMaskedAdd_f32<FS>( __VA_ARGS__ )
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/// <summary>
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/// return ( m ? a : (a - b) )
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/// </summary>
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/// <code>
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/// float32v FS_NMaskedSub_f32( float32v a, float32v b, mask32v m )
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/// </code>
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#define FS_NMaskedSub_f32( ... ) FastSIMD::NMaskedSub_f32<FS>( __VA_ARGS__ )
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/// <summary>
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/// return ( m ? a : (a * b) )
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/// </summary>
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/// <code>
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/// float32v FS_NMaskedMul_f32( float32v a, float32v b, mask32v m )
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/// </code>
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#define FS_NMaskedMul_f32( ... ) FastSIMD::NMaskedMul_f32<FS>( __VA_ARGS__ )
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// NMasked int32
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/// <summary>
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/// return ( m ? a : (a + b) )
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/// </summary>
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/// <code>
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/// int32v FS_NMaskedAdd_i32( int32v a, int32v b, mask32v m )
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/// </code>
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#define FS_NMaskedAdd_i32( ... ) FastSIMD::NMaskedAdd_i32<FS>( __VA_ARGS__ )
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/// <summary>
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/// return ( m ? a : (a - b) )
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/// </summary>
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/// <code>
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/// int32v FS_NMaskedSub_i32( int32v a, int32v b, mask32v m )
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/// </code>
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#define FS_NMaskedSub_i32( ... ) FastSIMD::NMaskedSub_i32<FS>( __VA_ARGS__ )
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/// <summary>
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/// return ( m ? a : (a * b) )
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/// </summary>
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/// <code>
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/// int32v FS_NMaskedMul_i32( int32v a, int32v b, mask32v m )
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/// </code>
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#define FS_NMaskedMul_i32( ... ) FastSIMD::NMaskedMul_i32<FS>( __VA_ARGS__ )
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namespace FastSIMD
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{
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//FMA
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template<typename FS>
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FS_INLINE typename FS::float32v FMulAdd_f32( typename FS::float32v a, typename FS::float32v b, typename FS::float32v c )
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{
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return (a * b) + c;
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}
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template<typename FS>
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FS_INLINE typename FS::float32v FNMulAdd_f32( typename FS::float32v a, typename FS::float32v b, typename FS::float32v c )
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{
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return -(a * b) + c;
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}
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// Masked float
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template<typename FS>
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FS_INLINE typename FS::float32v MaskedAdd_f32( typename FS::float32v a, typename FS::float32v b, typename FS::mask32v m )
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{
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return a + FS::Mask_f32( b, m );
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}
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template<typename FS>
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FS_INLINE typename FS::float32v MaskedSub_f32( typename FS::float32v a, typename FS::float32v b, typename FS::mask32v m )
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{
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return a - FS::Mask_f32( b, m );
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}
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template<typename FS>
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FS_INLINE typename FS::float32v MaskedMul_f32( typename FS::float32v a, typename FS::float32v b, typename FS::mask32v m )
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{
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return a * FS::Mask_f32( b, m );
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}
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// Masked int32
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template<typename FS>
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FS_INLINE typename FS::int32v MaskedAdd_i32( typename FS::int32v a, typename FS::int32v b, typename FS::mask32v m )
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{
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return a + FS::Mask_i32( b, m );
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}
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template<typename FS>
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FS_INLINE typename FS::int32v MaskedSub_i32( typename FS::int32v a, typename FS::int32v b, typename FS::mask32v m )
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{
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return a - FS::Mask_i32( b, m );
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}
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template<typename FS>
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FS_INLINE typename FS::int32v MaskedMul_i32( typename FS::int32v a, typename FS::int32v b, typename FS::mask32v m )
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{
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return a * FS::Mask_i32( b, m );
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}
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// NMasked float
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template<typename FS>
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FS_INLINE typename FS::float32v NMaskedAdd_f32( typename FS::float32v a, typename FS::float32v b, typename FS::mask32v m )
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{
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return a + FS::NMask_f32( b, m );
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}
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template<typename FS>
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FS_INLINE typename FS::float32v NMaskedSub_f32( typename FS::float32v a, typename FS::float32v b, typename FS::mask32v m )
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{
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return a - FS::NMask_f32( b, m );
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}
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template<typename FS>
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FS_INLINE typename FS::float32v NMaskedMul_f32( typename FS::float32v a, typename FS::float32v b, typename FS::mask32v m )
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{
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return a * FS::NMask_f32( b, m );
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}
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// NMasked int32
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template<typename FS>
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FS_INLINE typename FS::int32v NMaskedAdd_i32( typename FS::int32v a, typename FS::int32v b, typename FS::mask32v m )
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{
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return a + FS::NMask_i32( b, m );
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}
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template<typename FS>
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FS_INLINE typename FS::int32v NMaskedSub_i32( typename FS::int32v a, typename FS::int32v b, typename FS::mask32v m )
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{
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return a - FS::NMask_i32( b, m );
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}
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template<typename FS>
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FS_INLINE typename FS::int32v NMaskedMul_i32( typename FS::int32v a, typename FS::int32v b, typename FS::mask32v m )
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{
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return a * FS::NMask_i32( b, m );
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}
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template<typename FS, std::enable_if_t<std::is_same_v<typename FS::int32v, typename FS::mask32v>>* = nullptr>
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FS_INLINE typename FS::int32v MaskedIncrement_i32( typename FS::int32v a, typename FS::mask32v m )
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{
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return a - m;
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}
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template<typename FS, std::enable_if_t<!std::is_same_v<typename FS::int32v, typename FS::mask32v>>* = nullptr>
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FS_INLINE typename FS::int32v MaskedIncrement_i32( typename FS::int32v a, typename FS::mask32v m )
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{
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return MaskedSub_i32<FS>( a, typename FS::int32v( -1 ), m );
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}
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template<typename FS, std::enable_if_t<std::is_same_v<typename FS::int32v, typename FS::mask32v>>* = nullptr>
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FS_INLINE typename FS::int32v MaskedDecrement_i32( typename FS::int32v a, typename FS::mask32v m )
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{
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return a + m;
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}
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template<typename FS, std::enable_if_t<!std::is_same_v<typename FS::int32v, typename FS::mask32v>>* = nullptr>
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FS_INLINE typename FS::int32v MaskedDecrement_i32( typename FS::int32v a, typename FS::mask32v m )
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{
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return MaskedAdd_i32<FS>( a, typename FS::int32v( -1 ), m );
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}
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// Bitwise
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template<typename FS, std::enable_if_t<std::is_same_v<typename FS::int32v, typename FS::mask32v>>* = nullptr>
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FS_INLINE typename FS::mask32v BitwiseAndNot_m32( typename FS::mask32v a, typename FS::mask32v b )
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{
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return FS::BitwiseAndNot_i32( a, b );
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}
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template<typename FS, std::enable_if_t<!std::is_same_v<typename FS::int32v, typename FS::mask32v>>* = nullptr>
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FS_INLINE typename FS::mask32v BitwiseAndNot_m32( typename FS::mask32v a, typename FS::mask32v b )
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{
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return a & (~b);
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}
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// Trig
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template<typename FS>
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FS_INLINE typename FS::float32v Cos_f32( typename FS::float32v value )
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{
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typedef typename FS::int32v int32v;
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typedef typename FS::float32v float32v;
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typedef typename FS::mask32v mask32v;
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value = FS_Abs_f32( value );
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value -= FS_Floor_f32( value * float32v( 0.1591549f ) ) * float32v( 6.283185f );
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mask32v geHalfPi = value >= float32v( 1.570796f );
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mask32v geHalfPi2 = value >= float32v( 3.141593f );
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mask32v geHalfPi3 = value >= float32v( 4.7123889f );
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float32v cosAngle = value ^ FS_Mask_f32( ( value ^ float32v( 3.141593f ) - value ), geHalfPi );
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cosAngle = cosAngle ^ FS_Mask_f32( FS_Casti32_f32( int32v( 0x80000000 ) ), geHalfPi2 );
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cosAngle = cosAngle ^ FS_Mask_f32( cosAngle ^ ( float32v( 6.283185f ) - value ), geHalfPi3 );
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cosAngle *= cosAngle;
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cosAngle = FS_FMulAdd_f32( cosAngle, FS_FMulAdd_f32( cosAngle, float32v( 0.03679168f ), float32v( -0.49558072f ) ), float32v( 0.99940307f ) );
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return cosAngle ^ FS_Mask_f32( FS_Casti32_f32( int32v( 0x80000000 ) ), FS_BitwiseAndNot_m32( geHalfPi, geHalfPi3 ) );
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}
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template<typename FS>
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FS_INLINE typename FS::float32v Sin_f32( typename FS::float32v value )
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{
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return Cos_f32<FS>( typename FS::float32v( 1.570796f ) - value );
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}
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template<typename FS>
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FS_INLINE typename FS::float32v Exp_f32( typename FS::float32v x )
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{
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typedef typename FS::int32v int32v;
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typedef typename FS::float32v float32v;
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x = FS_Min_f32( x, float32v( 88.3762626647949f ) );
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x = FS_Max_f32( x, float32v( -88.3762626647949f ) );
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/* express exp(x) as exp(g + n*log(2)) */
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float32v fx = x * float32v( 1.44269504088896341f );
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fx += float32v( 0.5f );
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float32v flr = FS_Floor_f32( fx );
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fx = FS_MaskedSub_f32( flr, float32v( 1 ), flr > fx );
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x -= fx * float32v( 0.693359375f );
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x -= fx * float32v( -2.12194440e-4f );
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float32v y( 1.9875691500E-4f );
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y *= x;
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y += float32v( 1.3981999507E-3f );
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y *= x;
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y += float32v( 8.3334519073E-3f );
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y *= x;
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y += float32v( 4.1665795894E-2f );
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y *= x;
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y += float32v( 1.6666665459E-1f );
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y *= x;
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y += float32v( 5.0000001201E-1f );
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y *= x * x;
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y += x + float32v( 1 );
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/* build 2^n */
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int32v i = FS_Convertf32_i32( fx );
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// another two AVX2 instructions
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i += int32v( 0x7f );
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i <<= 23;
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float32v pow2n = FS_Casti32_f32( i );
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return y * pow2n;
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}
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template<typename FS>
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FS_INLINE typename FS::float32v Log_f32( typename FS::float32v x )
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{
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typedef typename FS::int32v int32v;
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typedef typename FS::float32v float32v;
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typedef typename FS::mask32v mask32v;
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mask32v validMask = x > float32v( 0 );
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x = FS_Max_f32( x, FS_Casti32_f32( int32v( 0x00800000 ) ) ); /* cut off denormalized stuff */
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// can be done with AVX2
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int32v i = FS_BitwiseShiftRightZX_i32( FS_Castf32_i32( x ), 23 );
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/* keep only the fractional part */
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x &= FS_Casti32_f32( int32v( ~0x7f800000 ) );
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x |= float32v( 0.5f );
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// this is again another AVX2 instruction
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i -= int32v( 0x7f );
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float32v e = FS_Converti32_f32( i );
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e += float32v( 1 );
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mask32v mask = x < float32v( 0.707106781186547524f );
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x = FS_MaskedAdd_f32( x, x, mask );
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x -= float32v( 1 );
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e = FS_MaskedSub_f32( e, float32v( 1 ), mask );
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float32v y = float32v( 7.0376836292E-2f );
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y *= x;
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y += float32v( -1.1514610310E-1f );
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y *= x;
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y += float32v( 1.1676998740E-1f );
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y *= x;
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y += float32v( -1.2420140846E-1f );
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y *= x;
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y += float32v( 1.4249322787E-1f );
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y *= x;
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y += float32v( -1.6668057665E-1f );
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y *= x;
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y += float32v( 2.0000714765E-1f );
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y *= x;
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y += float32v( -2.4999993993E-1f );
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y *= x;
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y += float32v( 3.3333331174E-1f );
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y *= x;
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float32v xx = x * x;
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y *= xx;
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y *= e * float32v( -2.12194440e-4f );
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y -= xx * float32v( 0.5f );
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x += y;
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x += e * float32v( 0.693359375f );
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return FS_Mask_f32( x, validMask );
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}
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template<typename FS>
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FS_INLINE typename FS::float32v Pow_f32( typename FS::float32v value, typename FS::float32v pow )
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{
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return Exp_f32<FS>( pow * Log_f32<FS>( value ) );
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}
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}
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